Icl7662 Regulador Generador Tension Negativa Capacitivo Soic8 Itytarg Ver más grande

Icl7662 Conversor Tension Positiva A Negativa Capacitivo Soic8 Itytarg

09268

Nuevo producto

KDY

Cod: ICL7662CBA+T

Analog Devices Inc./Maxim Integrated

Más detalles

1 Elemento

Advertencia: ¡Últimos artículos en stock!

compartir

$ 25.563,30 IVA Inc.

Más

Function Ratiometric
Output Configuration Negative
Topology Charge Pump
Output Type Fixed
Number of Outputs 1
Voltage - Input (Min) 4.5V
Voltage - Input (Max) 20V
Voltage - Output (Min/Fixed) -Vin
Voltage - Output (Max) -
Current - Output -
Frequency - Switching 10kHz
Synchronous Rectifier No
Operating Temperature 0°C ~ 70°C (TA)
Mounting Type Surface Mount
Package / Case 8-SOIC (0.154", 3.90mm Width)
Supplier Device Package 8-SOIC

Datasheet

CMOS Voltage Converter The Intersil ICL7662 is a monolithic high-voltage CMOS power supply circuit which offers unique performance advantages over previously available devices. The ICL7662 performs supply voltage conversion from positive to negative for an input range of +4.5V to +20.0V, resulting in complementary output voltages of -4.5V to -20V. Only 2 noncritical external capacitors are needed for the charge pump and charge reservoir functions. The ICL7662 can also function as a voltage doubler, and will generate output voltages up to +38.6V with a +20V input. Contained on chip are a series DC power supply regulator, RC oscillator, voltage level translator, four output power MOS switches. A unique logic element senses the most negative voltage in the device and ensures that the output N-Channel switch source-substrate junctions are not forward biased. This assures latchup free operation. The oscillator, when unloaded, oscillates at a nominal frequency of 10kHz for an input supply voltage of 15.0V. This frequency can be lowered by the addition of an external capacitor to the “OSC” terminal, or the oscillator may be overdriven by an external clock. The “LV” terminal may be tied to GROUND to bypass the internal series regulator and improve low voltage (LV) operation. At medium to high voltages (+10V to +20V), the LV pin is left floating to prevent device latchup.

4 productos más en la misma categoría: