Analog Front End 16 Bits Tc500 Dip16 Itytarg

No. de bits 17
Cantidad de canales 1
Potencia (W) 10mW
Suministro de voltaje (analógico) ±4.5V ~ 7.5V
Suministro de voltaje (digital) ±4.5V ~ 7.5V
Paquete / Caja (carcasa) 16-DIP (0.300", 7.62mm)
Paquete del dispositivo del proveedor 16-PDIP

Datasheet

Features:
• Precision (up to 17 bits) A/D Converter “Front
End”
• 3-Pin Control Interface to Microprocessor
• Flexible: User Can Trade-off Conversion Speed
for Resolution
• Single-Supply Operation (TC510/TC514)
• 4 Input, Differential Analog MUX (TC514)
• Automatic Input Voltage Polarity Detection
• Low Power Dissipation:
- (TC500/TC500A): 10 mW
- (TC510/TC514): 18 mW
• Wide Analog Input Range:
- ±4.2V (TC500A/TC510)
• Directly Accepts Bipolar and Differential
Input Signals
Applications:
• Precision Analog Signal Processor
• Precision Sensor Interface
• High Accuracy DC Measurements

General Description:
TheTC500/A/510/514 family are precision analog front
ends that implement dual slope A/D converters having
a maximum resolution of 17 bits plus sign. As a
minimum, each device contains the integrator, zero
crossing comparator and processor interface logic. The
TC500 is the base (16-bit max) device and requires
both positive and negative power supplies. The
TC500A is identical to the TC500 with the exception
that it has improved linearity, allowing it to operate to a
maximum resolution of 17 bits. The TC510 adds an onboard negative power supply converter for singlesupply operation. The TC514 adds both a negative
power supply converter and a 4-input differential
analog multiplexer.
Each device has the same processor control interface
consisting of 3 wires: control inputs (A and B) and zerocrossing comparator output (CMPTR). The processor
manipulates A, B to sequence the TC5XX through four
phases of conversion: auto-zero, integrate, deintegrate and integrator zero. During the auto-zero
phase, offset voltages in the TC5XX are corrected by a
closed loop feedback mechanism. The input voltage is
applied to the integrator during the integrate phase.
This causes an integrator output dv/dt directly
proportional to the magnitude of the input voltage. The
higher the input voltage, the greater the magnitude of
the voltage stored on the integrator during this phase.
At the start of the de-integrate phase, an external
voltage reference is applied to the integrator and, at the
same time, the external host processor starts its onboard timer. The processor maintains this state until a
transition occurs on the CMPTR output, at which time
the processor halts its timer. The resulting timer count
is the converted analog data. Integrator zero (the final
phase of conversion) removes any residue remaining
in the integrator in preparation for the next conversion.
The TC500/A/510/514 offer high resolution (up to
17 bits), superior 50/60 Hz noise rejection, low-power
operation, minimum I/O connections, low input bias
currents and lower cost compared to other converter
technologies having similar conversion speeds.