Nucleo-l476rg Stm32l476rg Stm32 Cortex M4 Arm Itytarg

Hardware

The STM32L476RG SoC provides the following hardware IPs:

• Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode and 100 uA/MHz run mode)
• Core: ARM® 32-bit Cortex®-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
• Clock Sources:
  • 4 to 48 MHz crystal oscillator
  • 32 kHz crystal oscillator for RTC (LSE)
  • Internal 16 MHz factory-trimmed RC ( ±1%)
  • Internal low-power 32 kHz RC ( ±5%)
  • Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)
  • 3 PLLs for system clock, USB, audio, ADC
• RTC with HW calendar, alarms and calibration
• LCD 8 x 40 or 4 x 44 with step-up converter
• Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
• 16x timers:
  • 2x 16-bit advanced motor-control
  • 2x 32-bit and 5x 16-bit general purpose
  • 2x 16-bit basic
  • 2x low-power 16-bit timers (available in Stop mode)
  • 2x watchdogs
  • SysTick timer
• Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
• Memories
  • Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
  • Up to 128 KB of SRAM including 32 KB with hardware parity check
  • External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
  • Quad SPI memory interface
• 4x digital filters for sigma delta modulator
• Rich analog peripherals (independent supply)
  • 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
  • 2x 12-bit DAC, low-power sample and hold
  • 2x operational amplifiers with built-in PGA
  • 2x ultra-low-power comparators
• 18x communication interfaces
  • USB OTG 2.0 full-speed, LPM and BCD
  • 2x SAIs (serial audio interface)
  • 3x I2C FM+(1 Mbit/s), SMBus/PMBus
  • 6x USARTs (ISO 7816, LIN, IrDA, modem)
  • 3x SPIs (4x SPIs with the Quad SPI)
  • CAN (2.0B Active) and SDMMC interface
  • SWPMI single wire protocol master I/F
• 14-channel DMA controller
• True random number generator
• CRC calculation unit, 96-bit unique ID
• Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™

More information about STM32L476RG can be found here:

• STM32L476RG on www.st.com
• STM32L476 reference manual

Connections and IOs

Nucleo L476RG Board has 8 GPIO controllers. These controllers are responsible for pin muxing, input/output, pull-up, etc.

Available pins:

For mode details please refer to STM32 Nucleo-64 board User Manual.

Default Zephyr Peripheral Mapping:

• UART_1_TX : PA9
• UART_1_RX : PA10
• UART_2_TX : PA2
• UART_2_RX : PA3
• UART_3_TX : PB10
• UART_3_RX : PB11
• I2C_1_SCL : PB6
• I2C_1_SDA : PB7
• SPI_1_NSS : PA4
• SPI_1_SCK : PB3
• SPI_1_MISO : PA6
• SPI_1_MOSI : PA7
• SPI_2_NSS : PB12
• SPI_2_SCK : PB13
• SPI_2_MISO : PB14
• SPI_2_MOSI : PB15
• SPI_3_NSS : PB12
• SPI_3_SCK : PC10
• SPI_3_MISO : PC11
• SPI_3_MOSI : PC12
• PWM_2_CH1 : PA0
• USER_PB : PC13
• LD2 : PA5

System Clock

Nucleo L476RG System Clock could be driven by internal or external oscillator, as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz, driven by 16MHz high speed internal oscillator.

Serial Port

Nucleo L476RG board has 6 U(S)ARTs. The Zephyr console output is assigned to UART2. Default settings are 115200 8N1.

Programming and Debugging

Applications for the nucleo_l476rg board configuration can be built and flashed in the usual way (see Build an Application and Run an Application for more details).